//==============================================================================
//	File:		$RCSfile: Adder.rdl,v $
//	Version:	$Revision: 1.5 $
//	Desc:		Adder Unit RDL Example
//	Author:		Greg Gibeling
//	Copyright:	Copyright 2005-2007 UC Berkeley
//
//	This copyright header must appear in all derivative works
//==============================================================================

//==============================================================================
//	Section:	License
//==============================================================================
// Copyright (c) 2005-2007, Regents of the University of California
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without modification,
// are permitted provided that the following conditions are met:
//
//     - Redistributions of source code must retain the above copyright notice,
//         this list of conditions and the following disclaimer. 
//     - Redistributions in binary form must reproduce the above copyright
//         notice, this list of conditions and the following disclaimer
//         in the documentation and/or other materials provided with the
//         distribution. 
//     - Neither the name of the University of California, Berkeley nor the
//         names of its contributors may be used to endorse or promote
//         products derived from this software without specific prior
//         written permission. 
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
// ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
// LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
// ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//==============================================================================

//==============================================================================
//	Section:	CVS Change Log
//==============================================================================
//	$Log: Adder.rdl,v $
//	Revision 1.5  2007/03/24 19:47:15  sshd_server
//	Added short comment about static identifiers at bottom
//	
//	Revision 1.4  2007/03/22 11:58:00  sshd_server
//	Separated Adder.rdl and Dummy.rdl
//	
//	Revision 1.3  2007/02/28 20:47:15  sshd_server
//	Spelling and typo corrections
//	
//	Revision 1.2  2007/02/27 02:10:59  sshd_server
//	Created RDL examples from RDLC2 test cases, FLEET and Overlog applications
//	
//==============================================================================

//==============================================================================
//	Section:	Includes
//	Desc:		This illustrates the use of the "include" directive in RDL as
//				well as separating the important parts of this example from the
//				parts which exist only to complete the example.  This statement
//				means that the contents of file "Dummery.rdl" will accessible
//				as if they were declared, verbatim inside a namespace "Dummy"
//				in this file.
//==============================================================================
include "Dummy.rdl" as Dummy;
//==============================================================================

//------------------------------------------------------------------------------
//	Unit:		Adder
//	Desc:		Simple adder unit, does not handle overflow.  Note that it has
//				two parameters, one for bitwidth, and one for the number of
//				inputs.  The implementation of this unit in, for example,
//				verilog is simple as RDLC2 will translate RDL parameters into
//				verilog parameters.
//				By parameter inference, this unit does not require that either
//				the bitwidth or number of inputs to be specified.
//------------------------------------------------------------------------------
unit <Width, NPorts> {
	input bit<$Width>[$NPorts] In;
	output bit<$Width> Sum;
} Adder;
//------------------------------------------------------------------------------

//------------------------------------------------------------------------------
//	Unit:		AdderExample
//	Desc:		This is an example of an adder instantiated to add two values.
//				Notice that neither the width, nor number of inputs to the adder
//				is specified, as these parameters can easily be inferred based on
//				the connections to the "In" port array.
//				Even better, the width of the "Sink" instance will be inferred in
//				the same way.
//------------------------------------------------------------------------------
unit {
	channel					InChannels[2], OutChannel;

	// The syntax "Dummy::DataSource" references the unit "DataSource" in the
	// namespace "Dummy", much like in C++.
	instance Dummy::DataSource<32>	Source1(InChannels[0]), Source2(InChannels[1]);
	instance Adder					Adder([index#0](InChannels[index#0]), OutChannel);
	instance Dummy::DataSink		Sink(OutChannel);
} AdderExample;
//------------------------------------------------------------------------------